{"id":147,"date":"2017-07-18T18:25:58","date_gmt":"2017-07-18T16:25:58","guid":{"rendered":"https:\/\/next-hack.com\/?p=147"},"modified":"2020-06-05T20:17:25","modified_gmt":"2020-06-05T18:17:25","slug":"how-to-play-a-20-fps-video-on-arduino-36-spi-or-usart-in-spi-mode","status":"publish","type":"post","link":"https:\/\/next-hack.com\/index.php\/2017\/07\/18\/how-to-play-a-20-fps-video-on-arduino-36-spi-or-usart-in-spi-mode\/","title":{"rendered":"How to play a 20 fps video on Arduino 3\/6: SPI or USART in SPI mode?"},"content":{"rendered":"

Introduction<\/span><\/h1>\n

Hi there!<\/span><\/p>\n

In the previous episode we showed you how to enable 8MHz transfers on the popular 1.8\u201d Display+SD shield. If you didn\u2019t read it, go and check it<\/a>, because it will be required for this episode!!!<\/span><\/p>\n

In this episode we want to address another issue: is the SPI module of Arduino\u2019s ATMEGA328 fast enough for our devices? <\/span><\/p>\n

This question is legit, in fact, if you consider the time taken by the test program (either with a scope, or by using the \u201cSerial Monitor\u201d function on the Arduino IDE), you\u2019ll notice that there is something going wrong: if the SPI is clocked ad 8MHz, you would expect 1MB\/s, therefore you should read your 900kiB (924kB) test.bmp file in 0.9s, whereas it takes about 2.4s., i.e. only 375kB\/s.<\/span><\/p>\n

\n
\"SPI

Fig. 1: Serial output from the SD card test code of the previous episode.<\/p><\/div>\n

\n

Note: in this article we consider M = 1 million and k = 1000. ki denotes 1024 and Mi denotes 1048576, i.e. 1024 ki. For sake of simplicity, in the video we don\u2019t make this distinction.<\/span><\/p>\n

This is well below the expected 1MB\/s! Less than 40% of the theoretical throughput!<\/span><\/p>\n

Of course, there is some software overhead (due to the FATfs library), and when the file pointer crosses the cluster boundary, the Fatfs needs to read the FAT table, in order to know the sector at which the next cluster begins. Also, there is a transmission overhead, because we must send \u2013 through the same SPI lines \u2013 several bytes composing the command to actually ask the SD to read one or more sectors. Finally, when we send a low-level read command to the SD card, it will take some time before data become available. This time depends on the SD card and on the type of read command: read single or read multiple blocks. If we just read a single block (as in our case), this delay time might be a substantial fraction of the total time taken by the actual read-out. In our case, we verified that the card takes over 225 microsencods! That\u2019s a huge amount of time! These non-SPI related overheads are explained in the video linked at the bottom of the page.<\/span><\/p>\n

So, to read the 900kiB of file, we need to read 1800 512-Bytes sectors. That means that 225*1800 microseconds are wasted, i.e. more than 0.4 seconds (note: reading in chunks larger that a single sector will for sure reduce the total time we are waiting). Therefore the time taken to read the actual data is about 2 seconds, i.e. we read at 450kB\/s. <\/span><\/p>\n

This again includes some software overhead, the time taken to send the SD command and the FAT readout. Still, we are less than half of the bandwidth one could expect from a 8MHz SPI. Is this due to software-only overhead, or is it due to the SPI module, being somewhat inefficient? <\/span><\/p>\n

We will find out that the SPI plays a major role.<\/span><\/p>\n

In fact, the SPI has single buffered writes, that is, the transmit register (SPDR) is also actually the transmit shift register, therefore you can\u2019t write a new byte, while the SPI module is still sending the old one.<\/span><\/p>\n

In order to see if you can send new data, you must check if the SPIF bit of the SPI status register (SPSR) is set to one. In other words, you must use the following instruction in C:<\/span><\/p>\n

loop_until_bit_is_set(SPSR,SPIF);<\/span><\/code><\/span><\/p>\n

Which translates into the following assembly instructions:<\/span><\/p>\n

Wait_Transmit:<\/span>\u00a0 in r16, SPSR;\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0<\/span> (Load SPSR to register r16)<\/span><\/code><\/span>
\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 sbrs r16, SPIF;\u00a0\u00a0\u00a0<\/span>\u00a0\u00a0 (SPIF bit set? exit)<\/span><\/code><\/span>
\n \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 rjmp Wait_Transmit;\u00a0 <\/span>(jump to the first instruction)<\/span><\/code><\/span><\/p>\n

(Note: We used r16 as example. The actual register number used will depend on your program. The particular register used will not affect the timings).<\/p>\n

The first instruction (in r16,SPSR<\/code><\/span>) takes 1 clock cycle. The second one takes 1 clock cycle if the bit was not set, otherwise, 2 clock cycles. The third one takes 2 clock cycles.<\/p>\n

As you can see, in the best case condition, you must wait 3 clock cycles before you can send another data (only the first two instructions would be executed), which will start the one cycle later.<\/p>\n

Therefore you waste at least 4 CPU clock cycles when sending one byte, which is 16 cpu clock cycles long. I.e. at the best case, you need 20 cpu clock cycles to transmit 8 bits. In other words, instead of sending at 1MBps you\u2019re sending at only 0.8 MBps. This is not even close to what we reached in our example.<\/p>\n

Still, to save those 4 lost CPU cycles, one might be tempted in writing the following trivial code:<\/p>\n

Write data to SPDR.
\nWait Exactly the minimum number of cycles required for the transfer to complete.
\nWrite again new data to SPDR.<\/code><\/p>\n

If you wanted to transmit data at the full sustained 8Mbps data rate, you should wait 15 CPU cycles between two consecutive writes to SPDR, so that for each byte you have 15 wait cycles + 1 write cycle (OUT instruction). In other words, 16 CPU cycles that is 1 us every 8 bit (i.e. 8Mbps or 1MBps. Please note that 1MBps = 1Mbps, as the B stands for byte and b stands for bit).<\/p>\n

You\u2019ll find that 15 wait cycles are not enough: if you only waited 15 cycles, you would incur to a write collision, because of the SPI module particular implementation, as you can see from the scope in the next figures.<\/p>\n

If you write this code, and you comment out (\/\/) even a single NOP line, not only you won\u2019t gain any speed improvement, but also you\u2019ll get half the speed (and of course, this will not work, as one byte out of two will be skipped)!<\/p>\n

SPSR |= 0x01;\u00a0\u00a0<\/span>\u00a0\u00a0\u00a0\u00a0\u00a0 \u00a0 \/\/ SPI 2x<\/span>
\nSPCR = 0b01010000;\u00a0\u00a0\u00a0<\/span>\u00a0 \/\/ 8M<\/span>
\nasm volatile<\/span>
\n(<\/span><\/code>
\n \u00a0 \/\/if you delete even a single nop, the code will not work as expected!<\/span><\/code>
\n\u00a0 \"transmit%=:\" \"\\n\\t\"<\/span><\/code>
\n \u00a0 \"OUT %[spdr],__tmp_reg__\" \"\\n\\t\"<\/span><\/code>
\n \u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n \u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n \u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n \u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n \u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n \u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n \u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n \u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n \u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n \u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n \u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n \u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n \u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n \u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n \u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n \u00a0 \"NOP\" \"\\n\\t\"<\/span>\u00a0\u00a0\u00a0\u00a0\u00a0 \/\/ sixteenth NOP<\/span><\/code>
\n\u00a0 \"OUT %[spdr],__tmp_reg__\" \"\\n\\t\"<\/span><\/code>
\n\u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n\u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n\u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n\u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n\u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n\u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n\u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n\u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n\u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n\u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n\u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n\u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n\u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n\u00a0 \"NOP\" \"\\n\\t\"<\/span><\/code>
\n\u00a0 \"RJMP transmit%=\" \"\\n\\t\"\u00a0\u00a0 \/\/ only 14 NOP's, because this takes 2 cycles<\/span><\/span><\/code>
\n: \/* no outputs*\/<\/span> : [spdr] \"I\" (_SFR_IO_ADDR(SPDR)) : );<\/span><\/code><\/p>\n

Therefore it turns out you must wait for 16 cycles, i.e. 17 CPU cycles per byte, which gives a theoretical maximum throughput achievable with the AVR SPI (when the CPU clock is 16MHz and the SPI clock is 8MHz) of 0.94 MBps.<\/p>\n

 <\/p>\n

\n
\"SPI,

Fig. 2. Clock waveform measured using 16 NOPs on the code shown above.<\/p><\/div>\n

\n

 <\/p>\n

\n
\"SPI

Fig. 2. Clock waveform measured using 15 NOPs on the code shown above. A byte out of two is missing!<\/p><\/div>\n

\n

This solution has one drawback, with respect to the loop_until_bit_is_set()<\/code> <\/span>function: if an interrupt occurs during a transmission, the CPU will always wait 16 cycles, regardless if the SPI already finished sending the previous data (while the interrupt was in execution). With loop_until_bit_is_set()<\/span><\/code><\/span> this problem might be partially mitigated, especially, as we\u2019ll see later, when we will use the USART instead.<\/p>\n

So now, knowing that we need 17 CPU cycles for each byte, we can determine EXACTLY how many cycles will be employed by the following piece of code, needed to send one character and wait until the SPSR is ready to accept a new byte:<\/p>\n

\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 out SPDR, r17;\u00a0<\/span>\u00a0\u00a0\u00a0\u00a0\u00a0 (write data to be sent)<\/code>
\nWait_Transmit:<\/span>\u00a0 in r16, SPSR;<\/span>\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 (Load SPSR to register r16)<\/code><\/span>
\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 sbrs r16, SPIF;\u00a0\u00a0<\/span>\u00a0\u00a0\u00a0 (SPIF bit set? exit)<\/code>
\n \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 rjmp Wait_Transmit;\u00a0<\/span> (jump to the first instruction)<\/code><\/p>\n

Note: in r17 we have the data to be sent.<\/p>\n

We know that the SPIF bit will be high 16 cycles after the OUT instruction. So this is the sequence of instructions which are actually executed by the CPU:<\/p>\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
Instruction<\/span><\/strong><\/td>\nCurrent cycle
\n(before instruction is executed)<\/span><\/strong><\/td>\n		SPIF in SPDR
\nwhen instruction is executed<\/span><\/strong><\/td>\n<\/tr>\n
out<\/td>\n0<\/span><\/td>\n1<\/span><\/td>\n<\/tr>\n
in<\/td>\n1<\/span><\/td>\n0<\/span><\/td>\n<\/tr>\n
sbrs<\/td>\n2<\/span><\/td>\n0<\/span><\/td>\n<\/tr>\n
rjmp (cycle 1)<\/td>\n3<\/span><\/td>\n0<\/span><\/td>\n<\/tr>\n
rjmp (cycle 2)<\/td>\n4<\/span><\/td>\n0<\/span><\/td>\n<\/tr>\n
in<\/td>\n5<\/span><\/td>\n0<\/span><\/td>\n<\/tr>\n
sbrs<\/td>\n6<\/span><\/td>\n0<\/span><\/td>\n<\/tr>\n
rjmp (cycle 1)<\/td>\n7<\/span><\/td>\n0<\/span><\/td>\n<\/tr>\n
rjmp (cycle 2)<\/td>\n8<\/span><\/td>\n0<\/span><\/td>\n<\/tr>\n
in<\/td>\n9<\/span><\/td>\n0<\/span><\/td>\n<\/tr>\n
sbrs<\/td>\n10<\/span><\/td>\n0<\/span><\/td>\n<\/tr>\n
rjmp (cycle 1)<\/td>\n11<\/span><\/td>\n0<\/span><\/td>\n<\/tr>\n
rjmp (cycle 2)<\/td>\n12<\/span><\/td>\n0<\/span><\/td>\n<\/tr>\n
in<\/td>\n13<\/span><\/td>\n0<\/span><\/td>\n<\/tr>\n
sbrs<\/td>\n14<\/span><\/td>\n0<\/span><\/td>\n<\/tr>\n
rjmp (cycle 1)<\/td>\n15<\/span><\/td>\n0<\/span><\/td>\n<\/tr>\n
in<\/td>\n16<\/span><\/td>\n0<\/span><\/td>\n<\/tr>\n
sbrs<\/td>\n17<\/span><\/td>\n1<\/span><\/td>\n<\/tr>\n
rjmp (cycle 1)<\/td>\n18<\/span><\/td>\n1<\/span><\/td>\n<\/tr>\n
rjmp (cycle 2)<\/td>\n20<\/span><\/td>\n1<\/span><\/td>\n<\/tr>\n
in<\/td>\n21<\/span><\/td>\n1<\/span><\/td>\n<\/tr>\n
sbrs * (cycle 1)<\/td>\n22<\/span><\/td>\n1<\/span><\/td>\n<\/tr>\n
sbrs * (cycle 2)<\/td>\n23<\/span><\/td>\n1<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

*Note: In the last step, the sbrs instruction takes 2 cycles, because SPIF is one.<\/p>\n

As you can see, it takes 24 cycles (0 through 23) to send 8 bytes of data, instead of 16! That is, you\u2019re sending only at 5.3 Mbps, i.e. 0.67 MBps! Even though this value is closer to what we measured, we are still missing the part in which we actually read the received data from the SPDR register (with an \u201cin\u201d instruction) and we write this value to our buffer (with a \u201cst\u201d instruction), accounting for 3 other cycles. This would yield 590kB\/s, still much larger than we actually achieved.<\/p>\n

And of course, when reading multiple bytes, we must create a loop and check if we finished reading the required number of bytes, etc.<\/p>\n

If you are familiar with the SPI module you can also make clever optimizations, because the SPDR is double buffered in reception. For instance, the pseudo code (which works if you need to send at least 2 bytes) might look like:<\/p>\n

SPDR = 0xFF\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 ; after this instruction we have 17 cycles in which we can do something else.<\/code>
\nSet remainingBytes to BytesToRead-1<\/code>
\nReceiveLoop:<\/code><\/span>
\n\u00a0 Wait for SPIF bit set in SPDR register<\/code>
\n\u00a0 SPDR = 0xFF<\/code>
\n\u00a0 Read SPDR and put into the destination array (Note that SPDR in read and write mode are actually two different registers!)<\/em><\/strong><\/code>
\n\u00a0 Decrement RemainingBytes<\/code>
\n\u00a0 If remainingBytes > 0<\/code>
\n\u00a0 \u00a0 Jump to ReceiveLoop<\/code>
\n\u00a0 Endif<\/code>
\n\u00a0 Wait For SPIF bit set in SPDR register<\/code>
\n\u00a0 Read last byte and put it into the destination array<\/code><\/p>\n

In C code we get:<\/p>\n

SPDR = 0xFF;<\/span>\u00a0\u00a0\u00a0\u00a0 \/\/ after this instruction we have 17 cycles in which we can do something else.<\/code>
\nremainingBytes = cnt - 1;<\/span>\u00a0\u00a0\u00a0\u00a0 \/\/ dont worry: the compiler will optimize and won't allocate a new variable!<\/code>
\ndo<\/code><\/span>
\n{<\/code><\/span>
\n\u00a0 loop_until_bit_is_set(SPSR, SPIF);\u00a0<\/span> \u00a0 \/\/Wait for SPIF bit set in SPDR register<\/code>
\n\u00a0 SPDR = 0xFF;<\/span><\/code>
\n\u00a0 *p++ = SPDR;<\/span>\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 \/\/Read SPDR and put into the destination array (Note that SPDR in read and write mode are actually two different registers!)<\/code>
\n\u00a0 remainingBytes--;<\/span>\u00a0\u00a0 \/\/ Decrement remainingBytes<\/code>
\n}<\/code><\/span>
\nwhile (remainingBytes);<\/code><\/span>
\nloop_until_bit_is_set(SPSR, SPIF);<\/span>\u00a0 \u00a0 \u00a0\/\/Wait for SPIF bit set in SPDR register<\/code>
\n*p++ = SPDR;<\/span> \/\/ Read last byte and put it into the destination array<\/code><\/p>\n

This code is much more optimized, because instead of doing nothing during the transmission, we do a lot of other work: we read the data, we store it into our array, we decrement the counter, we check if there are remaining bytes left and we make the jump to the beginning of the loop.<\/p>\n

And the time we get now is 1.86s (495kB\/s). Taking into account the 0.4s overhead due to the card delay, we have 1.46s, i.e. 0.63kB\/s, which is very close to the 0.67 MB\/s that we calculated before (note we still have the other software overhead and the timing previously shown in the table is no longer valid, as we are no more calling \u201cloop_until_bit_is_set\u201d just after writing to SPDR).<\/p>\n

 <\/p>\n

\n
\"\"

Fig. 4: Serial output of the SPI optimized Code<\/p><\/div>\n

\n

The scope shows clearly the optimized throughput:<\/p>\n

\n
\"\"

Fig. 5: Clock waveform with optimiyed SPI code.<\/p><\/div>\n

\n

In fact, two bytes are sent in 2.9 microseconds, that is, 690kB\/s. Much better than before, but still not enough. For those who are curious to see the performance of the code of the past episode, here is the measurement with the scope:<\/p>\n

\n
\"\"

Fig. 6: Clock waveform with the original unoptimized code of the last post.<\/p><\/div>\n

\n

In Fig 6, we are sending 2 bytes in about 4 microseconds, i.e. 500kB\/s. In other words, this code alone was responsible for the loss of HALF of the loss of performances!<\/p>\n

The USART in SPI MODE<\/h1>\n

Luckily, with the USART in SPI mode we can send data without any gap between consecutive bytes.<\/p>\n

In fact, the USART has a double buffered transmission (and read) register: i.e. there is a separate transmit register and transmit buffer (the latter is not accessible by the CPU). In other words, we can write fresh data even if the USART is still sending the previous one, provided that the transmit register is empty (i.e. regardless if the transmit buffer is full).<\/p>\n

This is very useful, because in this way we can provide the USART module with new data before it is \u201ctoo late\u201d, and continuous transmission (without gaps) can occur. In fact, when the USART transmits the last bit of the transmit buffer, it seamlessly copy the transmit register to the transmit buffer, so it can proceed (i.e. exactly after the last bit has been outputted) with the first bit of the new data just after the first byte as been sent.<\/p>\n

In this way we can safely use the loop_until_bit_is_set() (to check if the transmit register is empty), being sure that there won\u2019t be a transfer gap. In fact, even if the \u201cloop_until_bit_is_set()\u201d might take up to 6 clock cycles (the worst case is when the bit is set just after the first \u201cin\u201d instruction, and this would yield 6 CPU cycles), the USART will be still sending data, and you have 10 other more CPU cycles to write to the transmit buffer, before the transmitter goes idle (i.e. before transmit gap would occur).<\/p>\n

Therefore, the C code for sending data becomes:<\/p>\n

cnt -= 2;<\/span>\u00a0\u00a0 \/\/ next two transmissions are performed out of the do\u2026while loop.<\/code>
\nUDR0 = 0xFF;<\/code><\/span>
\nloop_until_bit_is_set(UCSR0A, UDRE0);<\/code><\/span>
\nUDR0 = 0xFF;<\/code><\/span>
\ndo<\/code><\/span>
\n{<\/code><\/span>
\n\u00a0 loop_until_bit_is_set(UCSR0A, RXC0);<\/code><\/span>
\n\u00a0 *p++ = UDR0;<\/code><\/span>
\n\u00a0 UDR0 = 0xFF;<\/span><\/code>
\n\u00a0 cnt--;<\/span><\/code>
\n} while (cnt);<\/code><\/span>
\nloop_until_bit_is_set(UCSR0A, RXC0);<\/code><\/span>
\n*p++ = UDR0;<\/code><\/span>
\nloop_until_bit_is_set(UCSR0A, RXC0);<\/code><\/span>
\nUCSR0A |= TXC0;<\/code><\/span>
\n*p++ = UDR0;<\/code><\/span><\/p>\n

With this new arrangement, there is no gap between bytes as you can see from the scope.<\/p>\n

\n
\"\"

Fig. 7: Clock output with the USART in SPI mode. No gap is generated between bytes!<\/p><\/div>\n

\n

Furthermore, measuring the delay between the blue LED turning on (yellow trace) and the red LED turning off (blue trace), we get the total time taken by our test program to read the 900kiB file.<\/p>\n

\n
\"\"

Fig. 8: Measuring the time taken by reading the 900kiB file.<\/p><\/div>\n

\n

We get 1.47s, i.e. 627kB\/s. Taking into account the 0.4 s (which, once again, does not depend on the clock speed, but on the card and the number of sectors read at once), we get 0.86kB\/s. This number can be still improved a little bit if we read in larger chunks, we promise!<\/p>\n

Of course, this does not come without any drawbacks. In fact, you\u2019ll lose the ability to send data through the UART, which is used by Arduino Uno for the serial USB transmission (in fact now we use a scope to determine the transfer speed) and programming. Therefore you\u2019ll need to disconnect the RXD wire (or the shield you\u2019re using) when you need to reprogram the Arduino.<\/p>\n

Another drawback in Arduino Uno is that the ATMEGA328\u2019s USART is connected to the ATMEGA16U8 through 1-kOhm resistors. Therefore some problem might arise (we\u2019ll see this in the next episode), if the ATMEGA16U8 interferes. We will teach you a trick to overcome this issue in the next episode!<\/p>\n

Despite all these drawbacks, we have another small advantage! If we don\u2019t use the SPI, we do not need to use the so stupidly misplaced IOH connector (how irritating is the fact that they didn\u2019t place it on a 0.1\u201d grid like the other connectors?!?). We can therefore use normal veroboards for our shields! Good!<\/p>\n

Finally, here are the step to replicate our results!<\/p>\n

\u00a0The hack!<\/h1>\n

Prerequisites<\/h3>\n

As shown in the previous episode you need a 900kiB (640×480 24 bit) bitmap file named test.bmp in your SD card. You also need the hack of the previous episode and you need the Arduino installed on your system. Of course also you need an Arduino J.<\/p>\n

Step 1:<\/h3>\n

Download the USART test-sd sketch<\/a>.<\/p>\n

Step 2:<\/h3>\n

Prepare the circuit shown in the schematics below. The breadboard image show a possible arrangement. Pease note that again we used the wires to connect the SD+Display module just to show you that there are resistors! In practice (see actual figure) we put the module over the 1.5k resistors! Please also note that, unlike the previous episode, we have also a fourth 1.5k resistor, connected to the MISO line. This is due because the ATMEGA16U2 (i.e. the uart to USB built in converter) is powered at 5V and its TXD pin is connected to the RXD pin of the ATMEGA328P with a 1k resistor.<\/p>\n

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Fig. 9: Schematics of the SD connection to the USART.<\/p><\/div>\n

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Fig. 10: Example of breadboard layout for the connection of the SD to the USART. The image was created using Fritzing (http:\/\/fritzing.org).<\/p><\/div>\n

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This is our actual breadboard implementation.<\/p>\n

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Fig. 11: Actual breadboard implementation.<\/p><\/div>\n

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Step 3:<\/h3>\n

If you want to measure the time taken by the new program, you have two possibilities: use a two channel scope, and connect one channel to the output connected to the red LED and the other to the output connected to the blue LED. Measure the time between when the blue LED turns on a when the red LED turns off. Otherwise, use a camera\/phone and take a video of the LEDs.\u00a0 Use then a program such as virtualDub or AviDemux to analyze (with accuracy depending on your frame rate, tyipically 1\/30fps = 33ms) this time!<\/p>\n

That\u2019s all for now. Don\u2019t miss the next episode! After all this wait, we will be actually playing the video!!!<\/p>\n

Be sure to watch the video of this episode<\/a> on our youtube channel! Also, rate, comment, share and subscribe<\/a>!<\/p>\n